Implementation of a resource-saving H.264 video encoder in the FPGA
FPGA/SoC: Zynq-7000S
Application: Implementation of a resource-saving H.264 video encoder in the FPGA
With the aid of video encoding, significant data compression can be achieved. In this example, a VHDL-based implementation was chosen which is very efficient and resource-saving and can therefore also be used on the target system with Zynq-7000S.